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Graduate Digital / ASIC Design Engineers

Employer
Confidential
Location
Cambridgeshire
Salary
28000.00 - 35000.00 GBP Annual + Dep on Experience + Great Benefits
Closing date
24 Aug 2021

View more

Specialism
Engineering
Sector
Engineering & Aerospace
Role Type
Graduate, Other work and training
Start Date
Immediate
Duration
Permanent
Graduate Digital / ASIC Design Engineers - RTL / FPGA / VHDL / SoC / Verilog / Verification. Wireless Connectivity / IoT / Voice & Music - 1st / 2.1 Bachelors /Masters + Good A levels.

A renowned name in the Wireless Communications market is seeking bright Graduate / Junior Engineers seeking a career in ASIC / Digital Design and Verification, who can bring A's and B's in 'A' level Maths and Physics, as well as a Good Degree or Masters in an Electronic related discipline.

Successful Graduates will be mentored by experienced Engineers, with openings in various areas including:

* ASIC Design with RTL design, Verilog / SystemVerilog and scripting.

* High speed or low power RTL Design using VHDL or Verilog.

* Digital design, verification and synthesis with EDA tools.

* Pre-tapeout validation utilizing FPGA and software tools.

To find out more detail on this highly rewarding Graduate openings, apply now.

Applicants must have full eligibility to work in the UK

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